UARTx_Reg_Typedef Struct Reference

UART peripheral register map for STM32F4. More...

#include <uart_reg.h>

Public Attributes
__IO uint32_t	SR
__IO uint32_t	DR
__IO uint32_t	BRR
__IO uint32_t	CR1
__IO uint32_t	CR2
__IO uint32_t	CR3
__IO uint32_t	GTPR

Detailed Description

UART peripheral register map for STM32F4.

This structure provides direct access to the memory-mapped UART registers. Each member corresponds to a specific UART register and its offset. All registers are marked as __IO for volatile read/write access.

Member Data Documentation

BRR

__IO uint32_t UARTx_Reg_Typedef::BRR

0x08: Baud Rate Register Configures UART baud rate based on peripheral clock.

CR1

__IO uint32_t UARTx_Reg_Typedef::CR1

0x0C: Control Register 1 Enables UART, configures word length, parity, etc.

CR2

__IO uint32_t UARTx_Reg_Typedef::CR2

0x10: Control Register 2 Configures stop bits, clock enable for synchronous mode.

CR3

__IO uint32_t UARTx_Reg_Typedef::CR3

0x14: Control Register 3 Enables DMA, error interrupts, smart card mode, etc.

DR

__IO uint32_t UARTx_Reg_Typedef::DR

0x04: Data Register Write to transmit data, read to receive data.

GTPR

__IO uint32_t UARTx_Reg_Typedef::GTPR

0x18: Guard Time and Prescaler Register Used for smart card mode timing and prescaler.

SR

__IO uint32_t UARTx_Reg_Typedef::SR

0x00: Status Register Contains flags like TXE, RXNE, TC, etc.

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The documentation for this struct was generated from the following file:

• include/core/cortex-m4/uart_reg.h