9#ifndef CORTEX_M4_UART_REG_H
10#define CORTEX_M4_UART_REG_H
40#define USART1_BASE 0x40011000
41#define USART2_BASE 0x40004400
42#define USART6_BASE 0x40011400
44#define GET_USARTx_BASE(n) \
45 ((UARTx_Reg_Typedef *)(n == 1 \
47 : (n == 2 ? (USART2_BASE) \
48 : (n == 6 ? (USART6_BASE) : (NULL)))))
52#define RCC_APB1ENR_USART2EN (1 << 17)
53#define RCC_APB2ENR_USART1EN (1 << 4)
54#define RCC_APB2ENR_USART6EN (1 << 5)
58#define USART_CR1_UE (1 << 13)
59#define USART_CR1_TE (1 << 3)
60#define USART_CR1_RE (1 << 2)
63#define USART_SR_TXE (1 << 7)
64#define USART_SR_RXNE (1 << 5)
Hardware Abstraction Layer (HAL) common type definitions.
#define __IO
Definition hal_types.h:20
UART peripheral register map for STM32F4.
Definition uart_reg.h:15
__IO uint32_t CR3
Definition uart_reg.h:32
__IO uint32_t GTPR
Definition uart_reg.h:35
__IO uint32_t BRR
Definition uart_reg.h:22
__IO uint32_t SR
Definition uart_reg.h:16
__IO uint32_t CR1
Definition uart_reg.h:25
__IO uint32_t CR2
Definition uart_reg.h:29
__IO uint32_t DR
Definition uart_reg.h:19