RCC_Typedef Struct Reference

RCC register map structure. More...

#include <rcc_reg.h>

Public Attributes
__IO uint32_t	CR
__IO uint32_t	PLLCFGR
__IO uint32_t	CFGR
__IO uint32_t	CIR
__IO uint32_t	AHB1RSTR
__IO uint32_t	AHB2RSTR
__IO uint32_t	RESERVED_18
__IO uint32_t	RESERVED_1C
__IO uint32_t	APB1RSTR
__IO uint32_t	APB2RSTR
__IO uint32_t	RESERVED_28
__IO uint32_t	RESERVED_2C
__IO uint32_t	AHB1ENR
__IO uint32_t	AHB2ENR
__IO uint32_t	RESERVED_38
__IO uint32_t	RESERVED_3C
__IO uint32_t	APB1ENR
__IO uint32_t	APB2ENR
__IO uint32_t	RESERVED_48
__IO uint32_t	RESERVED_4C
__IO uint32_t	AHB1LPENR
__IO uint32_t	AHB2LPENR
__IO uint32_t	RESERVED_58
__IO uint32_t	RESERVED_5C
__IO uint32_t	APB1LPENR
__IO uint32_t	APB2LPENR
__IO uint32_t	RESERVED_68
__IO uint32_t	RESERVED_6C
__IO uint32_t	BDCR
__IO uint32_t	CSR
__IO uint32_t	RESERVED_78
__IO uint32_t	RESERVED_7C
__IO uint32_t	SSCGR
__IO uint32_t	PLLI2SCFGR
__IO uint32_t	RESERVED_88
__IO uint32_t	DCKCFGR

Detailed Description

RCC register map structure.

Member Data Documentation

AHB1ENR

__IO uint32_t RCC_Typedef::AHB1ENR

AHB1 peripheral clock enable register

AHB1LPENR

__IO uint32_t RCC_Typedef::AHB1LPENR

AHB1 clock enable in low power mode

AHB1RSTR

__IO uint32_t RCC_Typedef::AHB1RSTR

AHB1 peripheral reset register

AHB2ENR

__IO uint32_t RCC_Typedef::AHB2ENR

AHB2 peripheral clock enable register

AHB2LPENR

__IO uint32_t RCC_Typedef::AHB2LPENR

AHB2 clock enable in low power mode

AHB2RSTR

__IO uint32_t RCC_Typedef::AHB2RSTR

AHB2 peripheral reset register

APB1ENR

__IO uint32_t RCC_Typedef::APB1ENR

APB1 peripheral clock enable register

APB1LPENR

__IO uint32_t RCC_Typedef::APB1LPENR

APB1 clock enable in low power mode

APB1RSTR

__IO uint32_t RCC_Typedef::APB1RSTR

APB1 peripheral reset register

APB2ENR

__IO uint32_t RCC_Typedef::APB2ENR

APB2 peripheral clock enable register

APB2LPENR

__IO uint32_t RCC_Typedef::APB2LPENR

APB2 clock enable in low power mode

APB2RSTR

__IO uint32_t RCC_Typedef::APB2RSTR

APB2 peripheral reset register

BDCR

__IO uint32_t RCC_Typedef::BDCR

Backup domain control register

CFGR

__IO uint32_t RCC_Typedef::CFGR

Clock configuration register

CIR

__IO uint32_t RCC_Typedef::CIR

Clock interrupt register

CR

__IO uint32_t RCC_Typedef::CR

Clock control register

CSR

__IO uint32_t RCC_Typedef::CSR

Clock control & status register

DCKCFGR

__IO uint32_t RCC_Typedef::DCKCFGR

Dedicated clock configuration register

PLLCFGR

__IO uint32_t RCC_Typedef::PLLCFGR

PLL configuration register

PLLI2SCFGR

__IO uint32_t RCC_Typedef::PLLI2SCFGR

PLLI2S configuration register

RESERVED_18

__IO uint32_t RCC_Typedef::RESERVED_18

Reserved

RESERVED_1C

__IO uint32_t RCC_Typedef::RESERVED_1C

Reserved

RESERVED_28

__IO uint32_t RCC_Typedef::RESERVED_28

Reserved

RESERVED_2C

__IO uint32_t RCC_Typedef::RESERVED_2C

Reserved

RESERVED_38

__IO uint32_t RCC_Typedef::RESERVED_38

Reserved

RESERVED_3C

__IO uint32_t RCC_Typedef::RESERVED_3C

Reserved

RESERVED_48

__IO uint32_t RCC_Typedef::RESERVED_48

Reserved

RESERVED_4C

__IO uint32_t RCC_Typedef::RESERVED_4C

Reserved

RESERVED_58

__IO uint32_t RCC_Typedef::RESERVED_58

Reserved

RESERVED_5C

__IO uint32_t RCC_Typedef::RESERVED_5C

Reserved

RESERVED_68

__IO uint32_t RCC_Typedef::RESERVED_68

Reserved

RESERVED_6C

__IO uint32_t RCC_Typedef::RESERVED_6C

Reserved

RESERVED_78

__IO uint32_t RCC_Typedef::RESERVED_78

Reserved

RESERVED_7C

__IO uint32_t RCC_Typedef::RESERVED_7C

Reserved

RESERVED_88

__IO uint32_t RCC_Typedef::RESERVED_88

Reserved

SSCGR

__IO uint32_t RCC_Typedef::SSCGR

Spread spectrum clock generation register

---

The documentation for this struct was generated from the following file:

• include/core/cortex-m4/rcc_reg.h