interrupt_reg.h File Reference

Cortex-M4 NVIC (Nested Vector Interrupt Controller) register definitions. More...

#include "common/hal_types.h"
#include <stdint.h>

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Go to the source code of this file.

Classes
struct	NVIC_Typedef
	NVIC register map. More...

Macros
#define	NVIC_BASE_ADDR   0xE000E100UL
#define	NVIC   ((NVIC_Typedef *)NVIC_BASE_ADDR)

Enumerations
enum	IRQn_Type {   NonMaskableInt_IRQn = -14 , HardFault_IRQn = -13 , MemoryManagement_IRQn = -12 , BusFault_IRQn = -11 ,   UsageFault_IRQn = -10 , SVCall_IRQn = -5 , DebugMonitor_IRQn = -4 , PendSV_IRQn = -2 ,   SysTick_IRQn = -1 , WWDG_IRQn = 0 , PVD_IRQn = 1 , TAMP_STAMP_IRQn = 2 ,   RTC_WKUP_IRQn = 3 , FLASH_IRQn = 4 , RCC_IRQn = 5 , EXTI0_IRQn = 6 ,   EXTI1_IRQn = 7 , EXTI2_IRQn = 8 , EXTI3_IRQn = 9 , EXTI4_IRQn = 10 ,   DMA1_Stream0_IRQn = 11 , DMA1_Stream1_IRQn = 12 , DMA1_Stream2_IRQn = 13 , DMA1_Stream3_IRQn = 14 ,   DMA1_Stream4_IRQn = 15 , DMA1_Stream5_IRQn = 16 , DMA1_Stream6_IRQn = 17 , ADC_IRQn = 18 ,   CAN1_TX_IRQn = 19 , CAN1_RX0_IRQn = 20 , CAN1_RX1_IRQn = 21 , CAN1_SCE_IRQn = 22 ,   EXTI9_5_IRQn = 23 , TIM1_BRK_TIM9_IRQn = 24 , TIM1_UP_TIM10_IRQn = 25 , TIM1_TRG_COM_TIM11_IRQn = 26 ,   TIM1_CC_IRQn = 27 , TIM2_IRQn = 28 , TIM3_IRQn = 29 , TIM4_IRQn = 30 ,   I2C1_EV_IRQn = 31 , I2C1_ER_IRQn = 32 , I2C2_EV_IRQn = 33 , I2C2_ER_IRQn = 34 ,   SPI1_IRQn = 35 , SPI2_IRQn = 36 , USART1_IRQn = 37 , USART2_IRQn = 38 ,   USART3_IRQn = 39 , EXTI15_10_IRQn = 40 , RTC_Alarm_IRQn = 41 , OTG_FS_WKUP_IRQn = 42 ,   TIM8_BRK_TIM12_IRQn = 43 , TIM8_UP_TIM13_IRQn = 44 , TIM8_TRG_COM_TIM14_IRQn = 45 , TIM8_CC_IRQn = 46 ,   DMA1_Stream7_IRQn = 47 , FMC_IRQn = 48 , SDIO_IRQn = 49 , TIM5_IRQn = 50 ,   SPI3_IRQn = 51 , UART4_IRQn = 52 , UART5_IRQn = 53 , TIM6_DAC_IRQn = 54 ,   TIM7_IRQn = 55 , DMA2_Stream0_IRQn = 56 , DMA2_Stream1_IRQn = 57 , DMA2_Stream2_IRQn = 58 ,   DMA2_Stream3_IRQn = 59 , DMA2_Stream4_IRQn = 60 , ETH_IRQn = 61 , ETH_WKUP_IRQn = 62 ,   CAN2_TX_IRQn = 63 , CAN2_RX0_IRQn = 64 , CAN2_RX1_IRQn = 65 , CAN2_SCE_IRQn = 66 ,   OTG_FS_IRQn = 67 , DMA2_Stream5_IRQn = 68 , DMA2_Stream6_IRQn = 69 , DMA2_Stream7_IRQn = 70 ,   USART6_IRQn = 71 , I2C3_EV_IRQn = 72 , I2C3_ER_IRQn = 73 , OTG_HS_EP1_OUT_IRQn = 74 ,   OTG_HS_EP1_IN_IRQn = 75 , OTG_HS_WKUP_IRQn = 76 , OTG_HS_IRQn = 77 , DCMI_IRQn = 78 ,   CRYP_IRQn = 79 , HASH_RNG_IRQn = 80 , FPU_IRQn = 81 }
	Cortex-M4 and STM32F4 interrupt numbers. More...

Detailed Description

Cortex-M4 NVIC (Nested Vector Interrupt Controller) register definitions.

This header defines the memory-mapped structure for NVIC registers, including set-enable, clear-enable, set-pending, clear-pending, active bit, and priority registers. It also enumerates all Cortex-M4 processor exceptions and STM32F4-specific interrupt numbers for use in HAL and driver code.

Note

The NVIC base address is 0xE000E100UL.

Copyright

© NAVROBOTEC PVT. LTD.

Macro Definition Documentation

NVIC

#define NVIC   ((NVIC_Typedef *)NVIC_BASE_ADDR)

NVIC instance pointer

NVIC_BASE_ADDR

#define NVIC_BASE_ADDR   0xE000E100UL

NVIC base address

Enumeration Type Documentation

IRQn_Type

enum IRQn_Type

Cortex-M4 and STM32F4 interrupt numbers.

Enumerates processor exceptions and STM32F4-specific peripheral interrupts for use in configuring NVIC and enabling/disabling interrupts.

Enumerator
NonMaskableInt_IRQn	2 Non Maskable Interrupt
HardFault_IRQn	3 Hard Fault Interrupt
MemoryManagement_IRQn	4 Memory Management Interrupt
BusFault_IRQn	5 Bus Fault Interrupt
UsageFault_IRQn	6 Usage Fault Interrupt
SVCall_IRQn	11 SV Call Interrupt
DebugMonitor_IRQn	12 Debug Monitor Interrupt
PendSV_IRQn	14 Pend SV Interrupt
SysTick_IRQn	15 System Tick Interrupt
WWDG_IRQn	Window Watchdog Interrupt
PVD_IRQn	PVD through EXTI Line detection Interrupt
TAMP_STAMP_IRQn	Tamper and TimeStamp interrupts
RTC_WKUP_IRQn	RTC Wakeup interrupt
FLASH_IRQn	FLASH global Interrupt
RCC_IRQn	RCC global Interrupt
EXTI0_IRQn	EXTI Line0 Interrupt
EXTI1_IRQn	EXTI Line1 Interrupt
EXTI2_IRQn	EXTI Line2 Interrupt
EXTI3_IRQn	EXTI Line3 Interrupt
EXTI4_IRQn	EXTI Line4 Interrupt
DMA1_Stream0_IRQn	DMA1 Stream 0 Interrupt
DMA1_Stream1_IRQn	DMA1 Stream 1 Interrupt
DMA1_Stream2_IRQn	DMA1 Stream 2 Interrupt
DMA1_Stream3_IRQn	DMA1 Stream 3 Interrupt
DMA1_Stream4_IRQn	DMA1 Stream 4 Interrupt
DMA1_Stream5_IRQn	DMA1 Stream 5 Interrupt
DMA1_Stream6_IRQn	DMA1 Stream 6 Interrupt
ADC_IRQn	ADC1, ADC2 and ADC3 global Interrupt
CAN1_TX_IRQn	CAN1 TX Interrupt
CAN1_RX0_IRQn	CAN1 RX0 Interrupt
CAN1_RX1_IRQn	CAN1 RX1 Interrupt
CAN1_SCE_IRQn	CAN1 SCE Interrupt
EXTI9_5_IRQn	External Line[9:5] Interrupts
TIM1_BRK_TIM9_IRQn	TIM1 Break and TIM9 Interrupts
TIM1_UP_TIM10_IRQn	TIM1 Update and TIM10 Interrupts
TIM1_TRG_COM_TIM11_IRQn	TIM1 Trigger and Commutation and TIM11 Interrupts
TIM1_CC_IRQn	TIM1 Capture Compare Interrupt
TIM2_IRQn	TIM2 global Interrupt
TIM3_IRQn	TIM3 global Interrupt
TIM4_IRQn	TIM4 global Interrupt
I2C1_EV_IRQn	I2C1 event interrupt
I2C1_ER_IRQn	I2C1 error interrupt
I2C2_EV_IRQn	I2C2 event interrupt
I2C2_ER_IRQn	I2C2 error interrupt
SPI1_IRQn	SPI1 global Interrupt
SPI2_IRQn	SPI2 global Interrupt
USART1_IRQn	USART1 global Interrupt
USART2_IRQn	USART2 global Interrupt
USART3_IRQn	USART3 global Interrupt
EXTI15_10_IRQn	External Line[15:10] Interrupts
RTC_Alarm_IRQn	RTC Alarm (A and B) through EXTI Line Interrupt
OTG_FS_WKUP_IRQn	USB OTG FS Wakeup through EXTI line interrupt
TIM8_BRK_TIM12_IRQn	TIM8 Break and TIM12 global Interrupt
TIM8_UP_TIM13_IRQn	TIM8 Update and TIM13 global Interrupt
TIM8_TRG_COM_TIM14_IRQn	TIM8 Trigger and Commutation and TIM14 global Interrupt
TIM8_CC_IRQn	TIM8 Capture Compare Interrupt
DMA1_Stream7_IRQn	DMA1 Stream7 Interrupt
FMC_IRQn	FMC global Interrupt
SDIO_IRQn	SDIO global Interrupt
TIM5_IRQn	TIM5 global Interrupt
SPI3_IRQn	SPI3 global Interrupt
UART4_IRQn	UART4 global Interrupt
UART5_IRQn	UART5 global Interrupt
TIM6_DAC_IRQn	TIM6 global and DAC1&2 underrun error interrupts
TIM7_IRQn	TIM7 global interrupt
DMA2_Stream0_IRQn	DMA2 Stream 0 global Interrupt
DMA2_Stream1_IRQn	DMA2 Stream 1 global Interrupt
DMA2_Stream2_IRQn	DMA2 Stream 2 global Interrupt
DMA2_Stream3_IRQn	DMA2 Stream 3 global Interrupt
DMA2_Stream4_IRQn	DMA2 Stream 4 global Interrupt
ETH_IRQn	Ethernet global Interrupt
ETH_WKUP_IRQn	Ethernet Wakeup through EXTI line Interrupt
CAN2_TX_IRQn	CAN2 TX Interrupt
CAN2_RX0_IRQn	CAN2 RX0 Interrupt
CAN2_RX1_IRQn	CAN2 RX1 Interrupt
CAN2_SCE_IRQn	CAN2 SCE Interrupt
OTG_FS_IRQn	USB OTG FS global Interrupt
DMA2_Stream5_IRQn	DMA2 Stream 5 global Interrupt
DMA2_Stream6_IRQn	DMA2 Stream 6 global Interrupt
DMA2_Stream7_IRQn	DMA2 Stream 7 global Interrupt
USART6_IRQn	USART6 global Interrupt
I2C3_EV_IRQn	I2C3 event Interrupt
I2C3_ER_IRQn	I2C3 error Interrupt
OTG_HS_EP1_OUT_IRQn	USB OTG HS End Point 1 Out Interrupt
OTG_HS_EP1_IN_IRQn	USB OTG HS End Point 1 In Interrupt
OTG_HS_WKUP_IRQn	USB OTG HS Wakeup through EXTI Interrupt
OTG_HS_IRQn	USB OTG HS global Interrupt
DCMI_IRQn	DCMI global Interrupt
CRYP_IRQn	Cryptographic Interrupt
HASH_RNG_IRQn	Hash and RNG Interrupt
FPU_IRQn	Floating Point Unit Interrupt