NavHAL 0.1.0
NAVRobotec's architecture-agnostic HAL for embedded systems.
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NVIC_Typedef Struct Reference

NVIC register map. More...

#include <interrupt_reg.h>

Public Attributes

__IO uint32_t ISER [8]
__IO uint32_t ICER [8]
__IO uint32_t ISPR [8]
__IO uint32_t ICPR [8]
__IO uint32_t IABR [8]
__IO uint32_t RESERVED0 [32]
__IO uint8_t IPR [60]

Detailed Description

NVIC register map.

< For __IO macro

Represents all NVIC registers including set/clear enable, set/clear pending, active bit registers, reserved space, and interrupt priority registers.

Member Data Documentation

◆ IABR

__IO uint32_t NVIC_Typedef::IABR[8]

Interrupt Active Bit Registers (0xE000E300 - 0xE000E31C)

◆ ICER

__IO uint32_t NVIC_Typedef::ICER[8]

Interrupt Clear-Enable Registers (0xE000E180 - 0xE000E19C)

◆ ICPR

__IO uint32_t NVIC_Typedef::ICPR[8]

Interrupt Clear-Pending Registers (0xE000E280 - 0xE000E29C)

◆ IPR

__IO uint8_t NVIC_Typedef::IPR[60]

Interrupt Priority Registers (8-bit) (0xE000E400 - 0xE000E4EC)

◆ ISER

__IO uint32_t NVIC_Typedef::ISER[8]

Interrupt Set-Enable Registers (0xE000E100 - 0xE000E11C)

◆ ISPR

__IO uint32_t NVIC_Typedef::ISPR[8]

Interrupt Set-Pending Registers (0xE000E200 - 0xE000E21C)

◆ RESERVED0

__IO uint32_t NVIC_Typedef::RESERVED0[32]

Reserved padding to 0xE000E400


The documentation for this struct was generated from the following file: