Cortex-M4 GPIO register definitions and access macros. More...
Go to the source code of this file.
Classes | |
struct | GPIOx_Typedef |
GPIO port register structure. More... |
Macros | |
#define | GPIOA_BASE_ADDR 0x40020000 |
#define | GPIOB_BASE_ADDR 0x40020400 |
#define | GPIOC_BASE_ADDR 0x40020800 |
#define | GPIOD_BASE_ADDR 0x40020C00 |
#define | GPIOE_BASE_ADDR 0x40021000 |
#define | GPIOH_BASE_ADDR 0x40021C00 |
#define | GPIO_GET_PORT_NUMBER(n) |
#define | GPIO_GET_PORT(n) |
#define | GPIO_GET_PIN(n) |
Cortex-M4 GPIO register definitions and access macros.
This header defines the GPIO register structure and macros to access GPIO ports and pins on Cortex-M4 microcontrollers.
Structures:
Macros:
#define GPIO_GET_PIN | ( | n | ) |
#define GPIO_GET_PORT | ( | n | ) |
Get pointer to GPIO port structure from absolute pin number
#define GPIO_GET_PORT_NUMBER | ( | n | ) |
#define GPIOA_BASE_ADDR 0x40020000 |
Base addresses for GPIO ports GPIOA base address
#define GPIOB_BASE_ADDR 0x40020400 |
GPIOB base address
#define GPIOC_BASE_ADDR 0x40020800 |
GPIOC base address
#define GPIOD_BASE_ADDR 0x40020C00 |
GPIOD base address
#define GPIOE_BASE_ADDR 0x40021000 |
GPIOE base address
#define GPIOH_BASE_ADDR 0x40021C00 |
GPIOH base address